Hardware Security in the Dark
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Aaron Carpenter,Yu Chen. Hardware Security in the Dark. International Journal of Software and Informatics, 2014,8(2):193~205
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Abstract:The increasing transistor count on a single chip provides an unprecedented amount of resources for chip designers. Unfortunately, the power consumed by each transistor does not shrink similarly, decreasing the amount of transistors that can be on simultaneously. This utilization wall leaves a growing percentage of transistors dark, or powered-off, as the chip cannot (a) provide the necessary current or (b) maintain a low operating temperature. To account for dark silicon, the computer architecture community has begun taking advantage of the wealth of available transistors to design efficient, time-sharing systems, often through specialized architectures. Meanwhile, security is quickly becoming a first-tier design constraint, increasing the need for hardware security mechanisms, in order to maintain high levels of availability and to detect and protect from intrusion. As we move into the many-core environment, many of these security mechanisms will need to be integrated on-chip. In a chip-multiprocessor environment, security will be necessary as multiple programs or users are sharing resources, thus facilitating attacks. In both a single-user and multiple-user environment, designers can build specialized hardware to provide support for security functions, such as authenticity, cryptography, and intrusion detection. In this paper, we survey current hardware security trends and provide insight on how future chip designs can leverage dark silicon for more secure designs. We provide preliminary designs and discuss future challenges and opportunities in dark silicon security. The merging of hardware security and dark silicon will facilitate efficient, fast, and secure designs.
keywords:hardware security  dark silicon  energy-efficiency
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